Tags: ADC, education, INL, integral nonlinearity, theory

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          There are three approaches, that can be found on websites and in books, to measure Integral Nonlinearity INL error.

          The first approach defines INL as a difference between the transfer curve of an ADC and the ideal straight line of the ideal conversion [9] as is illustrated in Fig. 43. The red dots in this and following figures indicate middles of conversion steps.

 
inl - example ideal line

Figure 43: INL of a 3-bit ADC calculated in regards to the line representing the ideal conversion.

 

          The second approach defines INL as a difference between the transfer curve of an ADC and the straight line that connects the middles of the first and last steps of an ADC transfer response [10]. This is illustrated in Fig. 44. The minimum value is now bigger, the maximum value moved down and consequently the maximum absolute INL error is smaller than in the first approach.

 

INL - example connected ends

Figure 44: INL of a 3-bit ADC calculated in regards to the line that connects the end points of the conversion.

 

          The third approach defines INL as a difference between the transfer curve of an ADC and the best-fit straight line that interpolates the transfer points [11]. In this approach, the INL errors are centered around x-axis the most, as presented in Fig. 45. Consequently, in the third approach, the maximum absolute INL error is the smallest from all the INL definitions.

 

INL - example interpolation line

Figure 45: INL of a 3-bit ADC calculated in regards to the interpolation line of the conversion.

 

          The transfer curve and the corresponding INL errors for an ideal 3-bit ADC are presented in Fig. 46. In this case, all the above definitions of the INL result in the same straight line. In the ideal case, INL error is equal to ± 0.5 LSB.

          The INL errors for transfer curves from Fig. 43-46 are gathered in Table 9.

 

INL ideal conversion plot ideal line

Figure 46: Transfer curve and the corresponding INL errors for an ideal 3-bit ADC.

 

Table 9: INL errors comparison of transfer curves from Fig. 43-46.

INL table different definitions

 

References:

  1. Baker R. Jacob, CMOS Circuit Design, Layout, and Simulation, 3rd Edition, 2010, John Wiley & Sons

  2. Camenzind H., Designing Analog Chips, February 2005

  3. Maloberti Franco, Data Converters, 2007, Springer

  4. Norsworthy S.R., Schreier R., Temes G.C., Delta-sigma Data Converters Theory, Design, and Simulation, 1997

  5. http://en.wikipedia.org/wiki/Delta-sigma_modulation

    Delta-sigma modulation (link available 2015.06)

  6. http://pdfserv.maximintegrated.com/en/an/AN634.pdf

    Maxim Integrated Products, Inc., TUTORIAL 634: Pipeline ADCs Come of Age, Nov 20, 2001 (link available 2015.06)

  7. http://pdfserv.maximintegrated.com/en/an/TUT810.pdf

    Maxim Integrated Products, Inc., TUTORIAL 810: UNDERSTANDING FLASH ADCS, (link available 2015.05)

  8. http://www.asdlib.org/onlineArticles/elabware/Scheeline_ADC/ADC_ADC.html#ADCMain

    Scheeline Alexander, Analog to Digital Conversion, (link available 2015.05)

  9. http://www.cypress.com/?id=4&rID=32117

    Document titled “Definitions of INL and DNL in an ADC” (link available 2015.05)

    Direct link to document: http://www.cypress.com/?docID=32695 (link available 2015.05)

  10. http://www.maximintegrated.com/en/app-notes/index.mvp/id/283

    Maxim Integrated Products, Inc., TUTORIAL 283: INL/DNL Measurements for High-Speed Analog-to-Digital Converters (ADCs) (link available 2015.05)

  11. http://www.maximintegrated.com/en/app-notes/index.mvp/id/1023

    Maxim Integrated Products, Inc., TUTORIAL 1023: Understanding Pipelined ADCs (link available 2015.05)

  12. http://www.maximintegrated.com/en/app-notes/index.mvp/id/1870

    Maxim Integrated Products, Inc., TUTORIAL 1870: Demystifying Delta-Sigma ADCs (link available 2015.06)