Tags: ADE L / XL, Cadence, schematic, shortcuts, simulators

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Schematic

ccopy

Ctrl + ddeselect all

e – one level down (read only)

E – one level down (edit mode)

Ctrl + e – one level up

ffit to window

i – add instance

llabel wire

mmove (wires do not change)

p – add pin

q – edit parameters

rrotate

sstretch (wires move with the object)

uundo

Uredo

w – add wire

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Create -> Note -> Shape (N) – for examples to create white rectangles

Create -> Note -> Text (Shift + N)

Launch -> Layout XL

Options -> Display -> (section) Display Controls: – how to turn on axes and xy coordinates

—–> Axes: ON

—–> Coordinates on Status Banner: ON

View -> Net Highlighting

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ADE L / XL

Results -> Direct Plot -> AC Gain & Phase

Results → Direct Plot → Main Form …

—–> —–> File → Open Results

Setup -> Model Libraries

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Plot [Virtuoso (R) Visualization & Analysis XL]

amarker A (dx and dy is automatically calculated between marker A and marker B)

bmarker B (dx and dy is automatically calculated between marker A and marker B)

vvertical marker

Ctrl + r – refresh

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Trace -> Bus -> Create …

—–> How to create digital bus:

—–> —–> If you have digital signals (for example created from analog ones using awvAnalog2Digital command) you can group them in a bus. Click: Trace -> Bus -> Create …

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CIW (main Virtuoso window)

Tools -> Technology File Manager

—–> Attach – How to attach a technology file to a chosen library?

—–> New:

—–> —–> 1. Technology Library Name: your_library_name

—–> —–> 2. Load ASCII Technology File: ee555tech.tf

—–> —–> 3. Path: /home/wong/Desktop/cadence_technology/

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Layout

Connectivity -> Update -> Components and Nets -> OK

Edit -> Hierarchy -> Flatten -> Flatten PCells -> OK – flatten for example a resistor to see how it is created (from what layers)

Options -> Display

—–> (area) Display Controls

—–> —–> Display Levels:

—–> —–> —–> Stop: 30

—–> (area) Grid Controls

—–> —–> Minor Spacing: 0.1

—–> —–> Major Spacing: 0.5

—–> —–> X Snap Spacing: 0.01

—–> —–> Y Snap Spacing: 0.01