Tags: ADC, architectures, convertion rates, flash, pipeline, resolution, sampling, speed, SAR, SPS, trade-off, two-step flash
When choosing an ADC architecture, most often two questions decide about the architecture:
What resolution is required?
What speed is required?
Resolution is given in bits. A length of digital word is equal to number of bits.
Speed may be described in sampling rate, conversion rate or throughput. Sampling rate is given as a frequency, for example kHz, MHz, GHz. Conversion rate and throughput are given in samples per second or SPS. Prefixes are used with samples per second, for example kSPS or MSPS.
There is a trade-off between the resolution and the speed of an ADC as illustrated in Fig. 1.
Figure 1: Speed vs resolution trade-off in ADCs.
Pictures on the following pages may also help:
Figure 1 (link available 2015.05)
Figure 8. (link available 2015.05)
http://www.google.pl/url?url=http://educypedia.karadimov.info/library/21841A.pdf&rct=j&q=&esrc=s&sa=U&ei=-DBzVJuICOe8ygPX0oK4CQ&ved=0CDYQFjAG&usg=AFQjCNFaKKYz1-iVe3hV9y89TpHdJ8f23A (link available 2015.05)
Picture titled “Architecture vs. Bits and Bandwidth”
Figure 1 and Table 1 (link available 2015.05)
Picture titled “Application range for Oversampling Sigma Delta and Pipeline ADC” (link available 2015.05)